The enormous increase in computational power of electronic computers during the past half-century has been made possible by advances in many different fields, from materials science and manufacturing-process design to theoretical and applied physics and computer science. In general, the rapid increase in computational bandwidth and efficiency has been made possible by a relentless increase in the density at which electronic components, including transistors and signal lines, can be manufactured within integrated circuits. The sizes of electronic components are currently being reduced to the sub-microscale and nanoscale levels. As feature sizes decrease, current fabrication methods based on photolithography are being pushed toward fundamental physical limitations, at which point the probability of manufacturing defects has begun to significantly increase. For nanoscale features and components, entirely new manufacturing methods are being developed, including methods that rely on self-assembly of nanoscale and molecular-scale building blocks. These new methods are currently accompanied with significantly greater probabilities of the occurrences of defects of various kinds. Both conventional photolithographic manufacturing techniques and newer molecular-electronics manufacturing techniques are being improved and refined in order to lower defect rates, but lowering defect rates to a level where perfect or nearly perfect devices can be produced at reasonable yields is currently impractical. Instead, designers and manufacturers of electronic devices are striving to design and produce defect-tolerant electronic circuits and devices that can operate correctly even when the circuits and devices include a reasonable number of manufacturing defects. Thus, designers, manufacturers, and vendors of electronic devices and electronic circuits continue to seek design principles and manufacturing methods that lead to increased defect tolerance in electronic circuits and electronic devices.